Receive Buffer Register
| RBR | Receive Buffer Register Field This field contains the data byte received on the serial input port in UART mode. The data is valid only if the UART_LCR[DR] is set. If FIFOs are disabled (UART_FCR[FIFOE] set to 0), the data in the UART_RBR must be read before the next data arrives, otherwise it will be overwritten, resulting in an over-run error. If FIFOs are enabled (UART_FCR[FIFOE] set to 1), this register accesses the head of the Rx FIFO. If the Rx FIFO is full and this field is not read before the next data character arrives, then the data already in the FIFO will be preserved but any incoming data will be lost and an over-run error occurs. |